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- Intro: Signal Won’t Toggle
Intro: Signal Won’t Toggle
You’re simulating a simple toggle flip-flop, but it’s not working — the output q
stays at 0
forever.
Here’s the code:
module toggle_ff (
input logic clk,
input logic rst_n,
output logic q
);
always_ff @(posedge clk or negedge rst_n) begin
if (!rst_n)
q <= 0;
else if (clk)
q <= ~q;
end
endmodule
❓ Your Challenge:
1. Why doesn’t q
toggle as expected during simulation?
2. What would you change to fix the code?
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